6 research outputs found

    Measurement-Based Timing Analysis of the AURIX Caches

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    Cache memories are one of the hardware resources with higher potential to reduce worst-case execution time (WCET) costs for software programs with tight real-time constraints. Yet, the complexity of cache analysis has caused a large fraction of real-time systems industry to avoid using them, especially in the automotive sector. For measurement-based timing analysis (MBTA) - the dominant technique in domains such as automotive - cache challenges the definition of test scenarios stressful enough to produce (cache) layouts that causing high contention. In this paper, we present our experience in enabling the use of caches for a real automotive application running on an AURIX multiprocessor, using software randomization and measurement-based probabilistic timing analysis (MBPTA). Our results show that software randomization successfully exposes - in the experiments performed for timing analysis - cache related variability, in a manner that can be effectively captured by MBPTA

    An automated framework for the timing analysis of applications for an automotive multicore processor

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    The inter-core interference that affects multicore processors highly complicates the timing analysis of embedded applications. The contribution of the execution-time penalty that software programs incur on access to hardware shared resources is hard to estimate, as it depends on both the resource arbitration policy and the quantity and activity of co-runners. An interesting vicious circle arises: the execution-time behavior of the application of interest must be known to determine its best allocation to a processor core; this decision however determines the actual set of co-runners, which in turns effects the inter-core interference suffered by the application of interest and consequently its execution-time behavior. This work presents a framework that aids the timing analysis of applications in presence of inter-core interference and addresses the cited circular dependency by providing a suite of synthetic co-runners designed to access hardware shared resources to produce fine-grained controlled interference. The framework specifically targets the Aurix Tricore family of processors designed by Infineon for the automotive domain, and includes a highly integrated toolchain to build, execute and trace applications. The toolchain includes a tailored version of Erika Enterprise, modified to exhibit time-composable behavior at run time, and the RT-Druid build environment. The paper includes an evaluation of the timing behavior of a real-world automotive application, adapted to fit the run-time target of choice and trialed under different levels of inter-core interference

    Putting RUN into Practice: Implementation and Evaluation2014 26th Euromicro Conference on Real-Time Systems

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    The Reduction to UNiprocessor (RUN) algorithm represents an original approach to multiprocessor scheduling that exhibits the prerogatives of both global and partitioned algorithms, without incurring the respective drawbacks. As an interesting trait, RUN promises to reduce the amount of migration interference. However, RUN has also raised some concerns on the complexity and specialization of its run-time support. To the best of our knowledge, no practical implementation and empirical evaluation of RUN have been presented yet, which is rather surprising, given its potential. In this paper we present the first solid implementation of RUN and extensively evaluate its performance against P-EDF and G-EDF, with respect to observed utilization cap, kernel overheads and inter-core interference. Our results show that RUN can be efficiently implemented on top of standard operating system primitives incurring modest overhead and interference, also supporting much higher schedulable utilization than its partitioned and global counterparts

    Experimental Evaluation of Optimal Schedulers Based on Partitioned Proportionate Fairness

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    The Quasi-Partitioning Scheduling algorithm optimally solves the problem of scheduling a feasible set of independent implicit-deadline sporadic tasks on a symmetric multiprocessor. It iteratively combines bin-packing solutions to determine a feasible task-to-processor allocation, splitting task loads as needed along the way so that the excess computation on one processor is assigned to a paired processor. Though different in formulation, QPS belongs in the same family of schedulers as RUN, which achieve optimality using a relaxed (partitioned) version of proportionate fairness. Unlike RUN, QPS departs from the dual schedule equivalence, thus yielding a simpler implementation with less use of global data structures. One might therefore expect that QPS should outperform RUN in the general case. Surprisingly instead, our implementation of QPS on LITMUS^RT invalidates this conjecture, showing that the QPS offline decisions may have an important influence on run-time performance. In this work, we present an extensive comparison between RUN and QPS, looking at both the offline and the online phases, to highlight their relative strengths and weaknesses

    (L)-Monomethyl Tyrosine (Mmt): New Synthetic Strategy via Bulky 'Forced-Traceless' Regioselective Pd-Catalyzed C(sp2)-H Activation

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    : The enormous influence in terms of bioactivity, affinity, and selectivity represented by the replacement of (L)-2,6-dimethyl tyrosine (Dmt) instead of Phenylalanine (Phe) into Nociceptin/orphanin (N/OFQ) neuropeptide analogues has been well documented in the literature. More recently, the non-natural amino acid (L)-2-methyl tyrosine (Mmt), with steric hindrance included between Tyr and Dmt, has been studied because of the modulation of steric effects in opioid peptide chains. Here, we report a new synthetic strategy to obtain Mmt based on the well-known Pd-catalyzed ortho-C(sp2)-H activation approach, because there is a paucity of other synthetic routes in the literature to achieve it. The aim of this work was to force only the mono-ortho-methylation process over the double ortho-methylation one. In this regard, we are pleased to report that the introduction of the dibenzylamine moiety on a Tyr aromatic nucleus is a convenient and traceless solution to achieve such a goal. Interestingly, our method provided the aimed Mmt either as N-Boc or N-Fmoc derivatives ready to be inserted into peptide chains through solid-phase peptide synthesis (SPPS). Importantly, the introduction of Mmt in place of Phe1 in the sequence of N/OFQ(1-13)-NH2 was very well tolerated in terms of pharmacological profile and bioactivity

    Measurement-based timing analysis of the AURIX caches

    No full text
    Cache memories are one of the hardware resources with higher potential to reduce worst-case execution time (WCET) costs for software programs with tight real-time constraints. Yet, the complexity of cache analysis has caused a large fraction of real-time systems industry to avoid using them, especially in the automotive sector. For measurement-based timing analysis (MBTA) - the dominant technique in domains such as automotive - cache challenges the definition of test scenarios stressful enough to produce (cache) layouts that causing high contention. In this paper, we present our experience in enabling the use of caches for a real automotive application running on an AURIX multiprocessor, using software randomization and measurement-based probabilistic timing analysis (MBPTA). Our results show that software randomization successfully exposes - in the experiments performed for timing analysis - cache related variability, in a manner that can be effectively captured by MBPTA.The research leading to these results has received funding from the European Community’s FP7 [FP7/2007-2013] under the PROXIMA Project (http://www.proxima project.eu), grant agreement no 611085. This work has also been partially supported by the Spanish Ministry of Science and Innovation (grant TIN2015-65316-P) and the HiPEAC Network of Excellence. Jaume Abella has been partially supported by the Ministry of Economy and Competitiveness under Ramon y Cajal fellowship RYC-2013-14717. This work was conducted as part of a collaboration with the CONCERTO project (ARTEMIS-JU grant nr. 333053), which provided the automotive application and the build automation. Authors thank Benjamin Lesage for his support in execution time collection infrastructure on the AURIX board.Peer Reviewe
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